Home > Seminars > Luca Amaru - Logic Computing Beyond CMOS

Luca Amaru - Logic Computing Beyond CMOS


2/22/2018 at 3:30PM


2/22/2018 at 4:30PM


126 DeBartolo


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Michael Niemier

Michael Niemier

VIEW FULL PROFILE Email: mniemier@nd.edu
Phone: 574-631-3858
Website: http://www.nd.edu/~mniemier/
Office: 380 Fitzpatrick Hall


College of Engineering Associate Professor
The primary focus of Mike's work is on computation beyond the CMOS field effect transistor. He is interested in the design and evaluation of computer architectures for emerging technologies, the integration of heterogeneous technologies to improve computational performance, and non-Boolean ...
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During the last six decades, computer technology has been moving forward at an incredible pace. From 1958 to 2018, computing systems have seen a 1 trillion-fold increase in performance and a commensurate increase in the complexity of tasks they can solve. This exceptional progress is reality thanks to the continuous research in device technology and computing models. In this talk, I show how new and technology-aware logic models can prolong this growth. First, I illustrate the enabling role of native logic abstractions in the study of emerging nanotechnologies, ranging from enhanced functionality devices to new computational paradigms. Second, I present technology-driven innovations in logic manipulation algorithms and data-structures, pushing further the solving limits for hard problems in computer science. Finally, I elaborate on the key role of device-level design in exposing the best logic primitives for computation with emerging nanotechnologies.

Seminar Speaker:

Luca Amaru

Luca Amaru

Synopsis Inc.

Luca Gaetano Amarù received the B.S. and M.S. degrees in electronic engineering from the Politecnico di Torino, Turin, Italy, in 2009 and 2011 respectively, and the Ph.D. degree in computer science from the Swiss Federal Institute of Technology Lausanne, Lausanne, Switzerland, in 2015. He is Senior II R&D Engineer in the Design Group of Synopsys Inc., Mountain View, CA, USA, where he is responsible for designing efficient data structures and algorithms for EDA. His current research interests include beyond CMOS design & exploration, logic manipulation, with emphasis on optimization and SAT, and accelerating logic reasoning engines, at both algorithmic and hardware implementation levels. Dr. Amaru is author or co-author of 75+ technical articles. His awards and achievements include: Best Paper Award Nomination in TCAD, 2017, EDAA Outstanding Dissertation Award, 2016, Best Presentation Award at FETCH conference, 2013, Best Paper Award Nomination at ASP-DAC conference, 2013, and others.