AI for chip design and electronic design automation (EDA) has received tremendous interests from both academia and industry in recent years. It touches everything that chip designers care about, from power, performance, area (PPA) to yield and design productivity, and so on. It is everywhere, in all levels of design abstractions, for digital and recently analog/RF IC designs as well. It has also been used to tweak the overall design flow and hyper-parameter tuning, but not yet all at once, e.g., generative AI from design specification to layout, in a correct-by-construction manner.
David Z. Pan,
The University of Texas at Austin
AI/ML can serve as hammers, bridges, and optimizers for various chip design/automation tasks, e.g., using supervised learning and graph neural networks for hotspot and timing prediction, reinforcement learning for macro-placement and transistor sizing, large language models for RTL and circuit topology generation, and many more.
In this talk, I will cover some recent research advancement and results in AI for chip design/EDA and share my perspectives.
David Z. Pan is the Silicon Labs Endowed Chair Professor at the Department of Electrical and Computer Engineering, The University of Texas at Austin. He received his Ph.D. in Computer Scienced from UCLA in 2000. His research interests include design automation for digital/analog/mixed-signal/RF ICs and emerging technologies, synergistic AI/IC co-optimizations, design and technology/system co-optimizations, etc. He has published over 520 refereed journal and conference papers and holds 10 US patents. He has served in many journal editorial boards and conference committees, e.g., as DAC 2024 TPC Chair and ICCAD 2019 General Chair. He has received many awards, including SRC Technical Excellence Award, 21 Best Paper Awards from premier EDA/chips venues, DAC Top 10 Author Award in Fifth Decade, among others. He has graduated 55 PhD students and postdocs who are now holding key academic and industry positions, and have won many top awards, e.g., the First Place of ACM Student Research Competition Grand Finals (twice). He is a Fellow of ACM, IEEE, and SPIE.